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Computer Engineering Final Year Topic: Design and Evaluation of Network-on-Chip Routing Contention

This Computer Engineering final year project investigates comparing packet latency in a bounded on-chip interconnect model, linking hardware behaviour and software assumptions through an explicitly bounded prototype or simulation.

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Why choose this project topic?

The topic makes comparing packet latency in a bounded on-chip interconnect model a testable computer-engineering problem with visible interfaces and failure cases. Measuring packet latency, throughput and buffer occupancy helps a student compare design alternatives and explain how resource constraints affect the proposed implementation.

How do the selected hardware or embedded-software choices affect packet latency, throughput and buffer occupancy when comparing packet latency in a bounded on-chip interconnect model?

Choose an available development board or simulator, agree the supported interface and workload, and narrow comparing packet latency in a bounded on-chip interconnect model with your supervisor.

Proposed project objectives

  1. 01Specify the interfaces, operating assumptions and expected behaviour for comparing packet latency in a bounded on-chip interconnect model.
  2. 02Simulate a small mesh, compare routing and buffer choices and replay identical synthetic traffic with hotspot patterns.
  3. 03Measure packet latency, throughput and buffer occupancy and document failures, resource limits and reproducibility.

A suggested research approach

Simulate a small mesh, compare routing and buffer choices and replay identical synthetic traffic with hotspot patterns. Keep all tests on owned, simulated or approved low-voltage equipment. Record hardware and tool versions, compare output with an independent reference, and evaluate packet latency, throughput and buffer occupancy using normal, boundary and interrupted-operation cases.

What you will need

  • Network-on-chip simulator
  • Synthetic traffic patterns
  • Documented topology

Keep your project scope clear

The model does not predict the performance or thermal behaviour of a fabricated processor. Project writing does not supply working firmware or manufactured hardware.

Computer Engineering project chapter outline

Use this outline as a starting point. You can edit the chapter titles to match your department’s format during setup.

  1. Chapter 1Introduction
  2. Chapter 2Literature Review
  3. Chapter 3Theory and Methodology
  4. Chapter 4Results and Applications
  5. Chapter 5Summary, Conclusion and Recommendations

Turn this topic into your own final year project.

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