Why choose this project topic?
The topic makes making shared-memory consistency failures visible in a two-core model a testable computer-engineering problem with visible interfaces and failure cases. Measuring coherence violations, message count and execution steps helps a student compare design alternatives and explain how resource constraints affect the proposed implementation.
How do the selected hardware or embedded-software choices affect coherence violations, message count and execution steps when making shared-memory consistency failures visible in a two-core model?
Choose an available development board or simulator, agree the supported interface and workload, and narrow making shared-memory consistency failures visible in a two-core model with your supervisor.
Proposed project objectives
- 01Specify the interfaces, operating assumptions and expected behaviour for making shared-memory consistency failures visible in a two-core model.
- 02Implement a restricted cache protocol, replay concurrent read-write traces and compare observed values with a specified reference memory model.
- 03Measure coherence violations, message count and execution steps and document failures, resource limits and reproducibility.
A suggested research approach
Implement a restricted cache protocol, replay concurrent read-write traces and compare observed values with a specified reference memory model. Keep all tests on owned, simulated or approved low-voltage equipment. Record hardware and tool versions, compare output with an independent reference, and evaluate coherence violations, message count and execution steps using normal, boundary and interrupted-operation cases.
What you will need
- Synthetic memory traces
- Protocol specification
- Deterministic simulator
Keep your project scope clear
The simplified model does not establish correctness of a real multicore processor. Project writing does not supply working firmware or manufactured hardware.
Computer Engineering project chapter outline
Use this outline as a starting point. You can edit the chapter titles to match your department’s format during setup.
- Chapter 1Introduction
- Chapter 2Literature Review
- Chapter 3System Analysis and Design
- Chapter 4System Implementation and Testing
- Chapter 5Summary, Conclusion and Recommendations
Turn this topic into your own final year project.
Your title, department, research question and outline are ready. Add your institution, personalise the details and continue to your project workspace.
Generate the Complete Project Generation uses your word balance. Review the draft and supply your own verified research findings.