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Computer Engineering Final Year Topic: Design and Evaluation of FPGA Traffic Controller Verification

This Computer Engineering final year project investigates verifying a fictional signal controller against explicit state-transition rules, linking hardware behaviour and software assumptions through an explicitly bounded prototype or simulation.

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Why choose this project topic?

The topic makes verifying a fictional signal controller against explicit state-transition rules a testable computer-engineering problem with visible interfaces and failure cases. Measuring assertion failures, state coverage and response cycles helps a student compare design alternatives and explain how resource constraints affect the proposed implementation.

How do the selected hardware or embedded-software choices affect assertion failures, state coverage and response cycles when verifying a fictional signal controller against explicit state-transition rules?

Choose an available development board or simulator, agree the supported interface and workload, and narrow verifying a fictional signal controller against explicit state-transition rules with your supervisor.

Proposed project objectives

  1. 01Specify the interfaces, operating assumptions and expected behaviour for verifying a fictional signal controller against explicit state-transition rules.
  2. 02Implement a small hardware-description model, simulate asynchronous requests and assert that incompatible outputs never activate together.
  3. 03Measure assertion failures, state coverage and response cycles and document failures, resource limits and reproducibility.

A suggested research approach

Implement a small hardware-description model, simulate asynchronous requests and assert that incompatible outputs never activate together. Keep all tests on owned, simulated or approved low-voltage equipment. Record hardware and tool versions, compare output with an independent reference, and evaluate assertion failures, state coverage and response cycles using normal, boundary and interrupted-operation cases.

What you will need

  • HDL simulator
  • Fictional transition specification
  • Automated testbench

Keep your project scope clear

The design is a teaching simulation and must not control a real road junction. Project writing does not supply working firmware or manufactured hardware.

Computer Engineering project chapter outline

Use this outline as a starting point. You can edit the chapter titles to match your department’s format during setup.

  1. Chapter 1Introduction
  2. Chapter 2Literature Review
  3. Chapter 3System Analysis and Design
  4. Chapter 4System Implementation and Testing
  5. Chapter 5Summary, Conclusion and Recommendations

Turn this topic into your own final year project.

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