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Computer Engineering Final Year Topic: Design and Evaluation of FPGA Fixed-Point FIR Accelerator

This Computer Engineering final year project investigates accelerating a bounded filter while controlling quantisation error, linking hardware behaviour and software assumptions through an explicitly bounded prototype or simulation.

Why choose this project topic?

The topic makes accelerating a bounded filter while controlling quantisation error a testable computer-engineering problem with visible interfaces and failure cases. Measuring numerical error, throughput and resource utilisation helps a student compare design alternatives and explain how resource constraints affect the proposed implementation.

How do the selected hardware or embedded-software choices affect numerical error, throughput and resource utilisation when accelerating a bounded filter while controlling quantisation error?

Choose an available development board or simulator, agree the supported interface and workload, and narrow accelerating a bounded filter while controlling quantisation error with your supervisor.

Proposed project objectives

  1. 01Specify the interfaces, operating assumptions and expected behaviour for accelerating a bounded filter while controlling quantisation error.
  2. 02Implement a reference filter and HDL pipeline, compare word lengths and verify outputs with synthetic impulse and frequency-sweep inputs.
  3. 03Measure numerical error, throughput and resource utilisation and document failures, resource limits and reproducibility.

A suggested research approach

Implement a reference filter and HDL pipeline, compare word lengths and verify outputs with synthetic impulse and frequency-sweep inputs. Keep all tests on owned, simulated or approved low-voltage equipment. Record hardware and tool versions, compare output with an independent reference, and evaluate numerical error, throughput and resource utilisation using normal, boundary and interrupted-operation cases.

What you will need

  • HDL simulator or FPGA board
  • Synthetic signals
  • Reference filter model

Keep your project scope clear

The accelerator is an educational prototype and is not validated for safety-critical sensing. Project writing does not supply working firmware or manufactured hardware.

Computer Engineering project chapter outline

Use this outline as a starting point. You can edit the chapter titles to match your department’s format during setup.

  1. Chapter 1Introduction
  2. Chapter 2Literature Review
  3. Chapter 3System Analysis and Design
  4. Chapter 4System Implementation and Testing
  5. Chapter 5Summary, Conclusion and Recommendations

Turn this topic into your own final year project.

Your title, department, research question and outline are ready. Add your institution, personalise the details and continue to your project workspace.

Generate the Complete Project Generation uses your word balance. Review the draft and supply your own verified research findings.