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Computer Engineering Final Year Topic: Design and Evaluation of Real-Time Task Deadline Monitor

This Computer Engineering final year project investigates detecting deadline misses in a fictional embedded task set, linking hardware behaviour and software assumptions through an explicitly bounded prototype or simulation.

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Why choose this project topic?

The topic makes detecting deadline misses in a fictional embedded task set a testable computer-engineering problem with visible interfaces and failure cases. Measuring missed deadlines, detection overhead and response jitter helps a student compare design alternatives and explain how resource constraints affect the proposed implementation.

How do the selected hardware or embedded-software choices affect missed deadlines, detection overhead and response jitter when detecting deadline misses in a fictional embedded task set?

Choose an available development board or simulator, agree the supported interface and workload, and narrow detecting deadline misses in a fictional embedded task set with your supervisor.

Proposed project objectives

  1. 01Specify the interfaces, operating assumptions and expected behaviour for detecting deadline misses in a fictional embedded task set.
  2. 02Create synthetic periodic tasks, implement deadline logging and compare scheduling policies under execution-time variation and interrupt load.
  3. 03Measure missed deadlines, detection overhead and response jitter and document failures, resource limits and reproducibility.

A suggested research approach

Create synthetic periodic tasks, implement deadline logging and compare scheduling policies under execution-time variation and interrupt load. Keep all tests on owned, simulated or approved low-voltage equipment. Record hardware and tool versions, compare output with an independent reference, and evaluate missed deadlines, detection overhead and response jitter using normal, boundary and interrupted-operation cases.

What you will need

  • Embedded scheduler simulator
  • Synthetic task set
  • Timing analysis tools

Keep your project scope clear

Passing simulated deadlines does not certify a device for life-critical operation. Project writing does not supply working firmware or manufactured hardware.

Computer Engineering project chapter outline

Use this outline as a starting point. You can edit the chapter titles to match your department’s format during setup.

  1. Chapter 1Introduction
  2. Chapter 2Literature Review
  3. Chapter 3System Analysis and Design
  4. Chapter 4System Implementation and Testing
  5. Chapter 5Summary, Conclusion and Recommendations

Turn this topic into your own final year project.

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